For programming PLL we need to follow some sequence and then only our new PLL settings will be effective. First write multiplier M and divider P values respectively to PLLCFG register. Since M and P values can have only specific values then there is a look up table used to determine PLLCFG bits is as follows:
TakeLPC2148 as an example case.
Now considerthe oscillator frequency (Fosc) as 12 MHz, then this register value become:
Here the relation between Fosc, CCLK and M is CCLK = M x Fosc . So, based on this we call M as multiplier. Mathematically (functionally) it is true but technically, it is not.
And then, Fccowill be maintained by using constant P value.
Fcco = CCLK * 2 * P
For this case, CCLK=60.
So, Fcco= 60 * 2 * P
= 120 * P
To maintain this value in the range of 156MHz to 320 MHz, you need to take P value as 2.
Therefore, Fcco= 240MHz.
Now, if you summarize all these points,
M = 5, P =2 => PLLCFG = 0x24 (010 0100).
Coming to coding part:
We need to follow the below sequential steps to set the PLL:
- Set the configure register bits CFG and CON.
- As a security measure, the PLL must be “fed” with “magic” values. This makes the CCO running, and the feedback path and the detector will tune it.It takes some time before the PLL is stable (“locked”).
- Wait for lock into the new frequency.
- Connect the PLL
- Again security measure: feed
In next page we will try and put all this in a program. Next Page