AVR: Interrupts Part I


Hi friends today we are going to discuss about the interrupt, in our practical life this word causes an annoying situation. Nobody wanted to get interrupted, but in controllers this offers a great deal of flexibility. One of the most useful principles of modern embedded processors is interrupt. Interrupts does exactly what it means. This tutorial is divided in two parts.

Normally, you would expect a program to keep on executing sequentially in the way you have defined. But when an interrupt occurs, the normal flow of instruction is suspended by the microcontroller and the interrupt service routine (ISR) of the according event is executed. So basically when ever interrupt event occur, we stop current task, handle the event then resume back where we left off.

interrupt

What exactly happens when interrupt happens?

Following is what happens when an interrupt occurs:

1.      Controller completes the instruction which is being executed.

2.      Control gets transfers to Interrupt Service Routine (ISR). (Each interrupt have an associated ISR which is a piece of code which tells the microcontroller what to do when an interrupt has occurred.)

3.      Execution of ISR is performed by loading the beginning address of the corresponding ISR into program counter.

4.      Execution of ISR continues until the return from the interrupt instruction (RETI) is encountered.

5.      When ISR is complete, the Controller resumes processing where it left off before the interrupt occurred.

There are two mainly two sources of interrupts available, but 8-bit AVR lacks software interrupts so we fall back to Hardware interrupts. Hardware interrupt which occurs in response to a timer reaching to predefined value or a particular pin changing its state.

To check number of interrupts available for a particular AVR microcontroller, please go through datasheets. You will find a chapter called interrupts, there you will find a reset and interrupt vector table. This table contains full list of possible available interrupts. This table contains Vector table address, source name and interrupts definition.

The following example will show how to use external interrupts (as opposed to timer interrupts) on an Atmel AVR using software written in GCC. The first thing to do is to see what interrupts are available for your model of processor. For this example I will be using the ATmega16.

You can use the data sheet available from Atmel to find the interrupts. The ATMEGA16/32 has 3 external interrupt lines: INTO, INT1 and INT2, on pins PD2, PD3 and PB2.

Interrupts on INT0 and INT1 can be level-triggered (meaning that the interrupt is triggered when the signal goes low i.e. 0V for some time or edge-triggered(meaning that the interrupt is triggered when the signal changes from high to low or low to high)

INT2 can only be used as an edge-triggered interrupt.

How to set interrupt control register?

MCUCR – MCU Control Register:

The MCU Control Register contains control bits for interrupt sense control and general MCU functions. The Bit0, Bit1, Bit2 and Bit3 of MCUCR register determines the nature of signal at which the interrupt 0 (INT0) and interrupt 1 (INT1) should occur.

MCUCR_reg

MCUCR register Bits 3,2 are used for sensing an external interrupt on line INT1. Similarly Bits 1,0 are used for sensing an external interrupt on line INT0. Following table shows different patterns to set the bits.

Interrupt 1 Sense Control
URGENT_1
MCUCSR – MCU Control & Status Register:

The MCU Control and Status Register provide information on which reset source caused an MCU Reset. The Bit6 of MCUCSR register determines the nature of signal at which the external interrupt 2 (INT2) should occur. INT2 is edge triggered only, it cannot be used for level triggering like INT0 and INT1.

MCUSCR

INT2 = 0 Falling Edge

INT2 = 1 Rising Edge

To avoid occurrence of interrupt while changing the ISC2 bit, please follow following procedure:

  • Disable INT2 by clearing its interrupt in GICR register.
  • The ISC2 bit can be changed
  • The INT2 interrupt Flag should be cleared by writing one to flag bit (INTF2) in the GIFR register before the interrupt is re-enabled.

GICR – General Interrupt Control Register:

The General Interrupt Control Register controls the placement of the Interrupt Vector table.

When bit value of Bit5, Bit6 and Bit7 are set to one, enables INT0, INT1 and INT2 interrupts. To disable or mask them just set it to zero.

GICR

GIFR – General Interrupt Flag Register:

Interrupt requests are managed by Bit 7, 6, 5. The flag is set for each of these when the respective line is triggered, and cleared when the corresponding interrupt service routine is executed. Alternatively, we can clear the flags manually by writing it to 1.

GIFR

Programming Steps:

For programming an interrupt, the following steps must be followed:

1.      Clear Global Interrupt enable bit in SREG register.

2.      Initialize the interrupt by appropriately configuring the MCUCR, MCUCSR and GICR registers.

3.      Set Global Interrupt Enable bit in SREG register.

4.      Define the appropriate Interrupt service routine (ISR) for the interrupt.

 Please don’t forget to follow part II of this tutorial. If you like this tutorial, please click like button on facebook plugin…Thanks!

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About author

This article was written by admin

Admin has over twenty years experience in the electronics industry, largely dedicated to embedded software. A frequent presenter at conferences and seminars and author of numerous technical articles. Working presently as Development Manager in India. A firm Believer in Knowledge grows when it shared.

Comments

Comments (2)
  1. snj says - Posted: December 28, 2012

    This helped me a lot…thanks bro!

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